Scheduling revamp

.github/workflows/main.yml

@@ -23,7 +23,7 @@ jobs:
     strategy:
       matrix:
         compiler: [g++, clang++]
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-20.04
     steps:
       - name: Check out repository code
         uses: actions/checkout@v4

.github/workflows/synth-sv.yml

@@ -32,25 +32,25 @@ jobs:
             config: add_int_2
           ## matrixmul configs.
           - kernel: matrixmul2
-            config: add_int_2_mul_int3
+            config: add_int_2_mul_int_3
           ## movingsum configs.
           - kernel: movingsum
             config: add_int_2
           - kernel: movingsum
             config: add_int_8
           ## muxmul configs.
           - kernel: muxmul
-            config: add_int_2_mul_int3
+            config: add_int_2_mul_int_3
           ## polynomial2 configs.
           - kernel: polynomial2
-            config: add_int_2_mul_int3
+            config: add_int_2_mul_int_3
           - kernel: polynomial2
-            config: add_int_8_mul_int15
+            config: add_int_8_mul_int_15
           ## scalar3 configs.
           - kernel: scalar3
-            config: add_int_2_mul_int3
+            config: add_int_2_mul_int_3
 
-    runs-on: ubuntu-latest
+    runs-on: ubuntu-20.04
     env:
       MODULE_OUTPUT_PATH: "output.sv"
       LIBRARY_OUTPUT_PATH: "lib.sv"

README.md

@@ -219,7 +219,8 @@ Unless neither of the three arguments is used, first argument is the mode which
 * `--config <PATH>`: *required* filesystem-path option; used to specify the file for a JSON latency configuration file. Its format is presented in `docs/latency_config.md`.
 * `--out-sv <PATH>`: *optional* filesystem-path option; used to specify the output SystemVerilog file.
 * `--out-sv-lib <PATH>`: *optional* filesystem-path option; used to specify the output SystemVerilog file for generated operations library.
-* `--out-dfcir <PATH>`: *optional* filesystem-path option; used to specify the output DFCIR file.
+* `--out-dfcir <PATH>`: *optional* filesystem-path option; used to specify the output unscheduled DFCIR file.
+* `--out-scheduled-dfcir <PATH>`: *optional* filesystem-path option; used to specify the output scheduled DFCIR file.
 * `--out-firrtl <PATH>`: *optional* filesystem-path option; used to specify the output FIRRTL file.
 * `--out-dot <PATH>`: *optional* filesystem-path option; used to specify the output DOT file.
 * `-a` or `-l`: *required* flag; used to specify the chosen scheduling strategy - either as-soon-as-possible or linear programming. **Exactly one of these flags has to be specified**.

config.json

@@ -1,13 +1,14 @@
 {
   "hls": {
-    "config"         : "",
-    "asap_scheduler" : false,
-    "lp_scheduler"   : false,
-    "out_sv"         : "",
-    "out_sv_lib"     : "",
-    "out_dfcir"      : "",
-    "out_firrtl"     : "",
-    "out_dot"        : ""
+    "config"             : "",
+    "asap_scheduler"     : false,
+    "lp_scheduler"       : false,
+    "out_sv"             : "",
+    "out_sv_lib"         : "",
+    "out_dfcir"          : "",
+    "out_scheduled_dfcir": "",
+    "out_firrtl"         : "",
+    "out_dot"            : ""
   },
   "sim": {
     "in"           : "sim.txt",

examples/addconst/add_int_2.json

@@ -1,3 +1,5 @@
 {
-  "ADD_INT": 2
+  "dfcir": {
+    "ADD_INT": 2
+  }
 }

examples/addconst/addconst.h

@@ -23,9 +23,10 @@ class AddConst : public dfcxx::Kernel {
     const DFType type = dfUInt(32);
     DFVariable x = io.input("x", type);
     DFVariable const5 = constant.var(type, uint64_t(5));
-    DFVariable sum1 = x + const5;
-    DFVariable sum2 = sum1 + x;
+    DFVariable sum1 = x + x;
+    DFVariable sum2 = sum1 + const5;
+    DFVariable sum3 = sum2 + x;
     DFVariable out = io.output("out", type);
-    out.connect(sum2);
+    out.connect(sum3);
   }
 };

examples/idct/add_int_1_sub_int_1_mul_int_3.json

@@ -1,5 +1,7 @@
 {
-  "ADD_INT": 1,
-  "SUB_INT": 1,
-  "MUL_INT": 3
+  "dfcir": {
+    "ADD_INT": 1,
+    "SUB_INT": 1,
+    "MUL_INT": 3
+  }
 }

examples/matrixmul2/add_int_2_mul_int_3.json

@@ -0,0 +1,6 @@
+{
+  "dfcir": {
+    "ADD_INT": 2,
+    "MUL_INT": 3
+  }
+}

examples/movingsum/add_int_2.json

@@ -1,3 +1,5 @@
 {
-  "ADD_INT": 2
-}
+  "dfcir": {
+    "ADD_INT": 2
+  }
+}

examples/movingsum/add_int_8.json

@@ -1,3 +1,5 @@
 {
-  "ADD_INT": 8
-}
+  "dfcir": {
+    "ADD_INT": 8
+  }
+}

examples/muxmul/add_int_2_mul_int_3.json

@@ -0,0 +1,6 @@
+{
+  "dfcir": {
+    "ADD_INT": 2,
+    "MUL_INT": 3
+  }
+}

examples/polynomial2/add_int_2_mul_int_3.json

@@ -0,0 +1,6 @@
+{
+  "dfcir": {
+    "ADD_INT": 2,
+    "MUL_INT": 3
+  }
+}

examples/polynomial2/add_int_8_mul_int_15.json

@@ -0,0 +1,6 @@
+{
+  "dfcir": {
+    "ADD_INT": 8,
+    "MUL_INT": 15
+  }
+}

examples/polynomial2_inst/add_int_2_mul_int_3.json

@@ -0,0 +1,6 @@
+{
+  "dfcir": {
+    "ADD_INT": 2,
+    "MUL_INT": 3
+  }
+}

examples/scalar3/add_int_2_mul_int_3.json

@@ -0,0 +1,6 @@
+{
+  "dfcir": {
+    "ADD_INT": 2,
+    "MUL_INT": 3
+  }
+}

src/model/dfcir/include/dfcir/DFCIROpInterfaces.td

@@ -12,13 +12,95 @@
 include "mlir/IR/OpBase.td"
 
 def NamedOpVal : OpInterface<"NamedOpVal"> {
+  let cppNamespace = "mlir::dfcir";
+
+  let methods = [
+    InterfaceMethod<
+      "Get the value name",
+      "llvm::StringRef",
+      "getValueName",
+      (ins),
+      /*methodBody=*/[{ return $_op.getName(); }],
+      /*defaultImplementation=*/[{}]
+    >
+  ];
+}
+
+def InputOutputOpInterface : OpInterface<"InputOutputOpInterface"> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def InputOpInterface : OpInterface<"InputOpInterface", [InputOutputOpInterface]> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def OutputOpInterface : OpInterface<"OutputOpInterface", [InputOutputOpInterface]> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def NaryOpInterface : OpInterface<"NaryOpInterface"> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def UnaryOpInterface : OpInterface<"UnaryOpInterface", [NaryOpInterface]> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def BinaryOpInterface : OpInterface<"BinaryOpInterface", [NaryOpInterface]> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def ShiftOpInterface : OpInterface<"ShiftOpInterface"> {
+  let cppNamespace = "mlir::dfcir";
+}
+
+def ConstantInputInterface : OpInterface<"ConstantInputInterface"> {
+  let cppNamespace = "mlir::dfcir";
+}
 
+def Scheduled : OpInterface<"Scheduled"> {
   let cppNamespace = "mlir::dfcir";
 
   let methods = [
-    InterfaceMethod<"Get the value name",
-    "llvm::StringRef", "getValueName", (ins),
-    /*methodBody=*/[{ return $_op.getName(); }]>
+    InterfaceMethod<
+      "Get clock latency (or -1 if not set).",
+      "int32_t",
+      "getLatency",
+      (ins),
+      /*methodBody=*/[{
+        return static_cast<int32_t>(getLatencyAttr(impl, $_op).getSInt());
+      }],
+      /*defaultImplementation=*/[{}]
+    >,
+    InterfaceMethod<
+      "Get clock latency as an attribute.",
+      "mlir::IntegerAttr",
+      "getLatencyAttr",
+      (ins),
+      /*methodBody=*/[{ return $_op.getLatencyAttr(); }],
+      /*defaultImplementation=*/[{}]
+    >,
+    InterfaceMethod<
+      "Set clock latency (-1 means it is not set).",
+      "void",
+      "setLatency",
+      (ins "int32_t":$latency),
+      /*methodBody=*/[{
+        auto attr = 
+            mlir::IntegerAttr::get(IntegerType::get($_op.getContext(), 32),
+                                   latency);
+        return setLatencyAttr(impl, $_op, attr);
+      }],
+      /*defaultImplementation=*/[{}]
+    >,
+    InterfaceMethod<
+      "Set clock latency as an attribute.",
+      "void",
+      "setLatencyAttr",
+      (ins "mlir::IntegerAttr":$latency),
+      /*methodBody=*/[{ return $_op.setLatencyAttr(latency); }],
+      /*defaultImplementation=*/[{}]
+    >
   ];
 }