Fix compile error of 'assigning to &T is undefined behavior'

Signed-off-by: Chien Wong <[email protected]>
riscv-rust · Nov 25, 2023 · 06bb998 · 06bb998
1 parent fdb0685
commit 06bb998
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/src/serial.rs b/src/serial.rs
@@ -419,6 +419,7 @@ impl<USART: UsartX> crate::hal::serial::Write<u8> for Tx<USART> {
             // NOTE(unsafe) atomic write to stateless register
             // NOTE(write_volatile) 8-bit write that's not possible through the svd2rust API
             unsafe {
+                #[allow(invalid_reference_casting)]
                 ptr::write_volatile(&(*USART::ptr()).data as *const _ as *mut _, byte)
             }
             Ok(())