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Make lr/sc encdec mapping formatting consistent
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PeterRugg committed Jan 21, 2025
1 parent 972c997 commit e66dd0a
Showing 1 changed file with 4 additions and 8 deletions.
12 changes: 4 additions & 8 deletions src/cheri_insts.sail
Original file line number Diff line number Diff line change
Expand Up @@ -1161,14 +1161,10 @@ mapping clause assembly = AMOSwapCap(cd, cs2, rs1, aq, rl) <-> "amoswap.c" ^ m
widths but refuses to decode them we can implement them for CHERI simply by
adding the decodings here.
*/
mapping clause encdec = LOADRES(aq, rl, rs1, size, rd)
if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
<-> 0b00010 @ bool_bits(aq) @ bool_bits(rl) @ 0b00000 @ rs1 @ 0b0 @ size_enc(size) @ rd @ 0b0101111
if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
mapping clause encdec = STORECON(aq, rl, rs2, rs1, size, rd)
if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
<-> 0b00011 @ bool_bits(aq) @ bool_bits(rl) @ rs2 @ rs1 @ 0b0 @ size_enc(size) @ rd @ 0b0101111
if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
mapping clause encdec = LOADRES(aq, rl, rs1, size, rd) if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
<-> 0b00010 @ bool_bits(aq) @ bool_bits(rl) @ 0b00000 @ rs1 @ 0b0 @ size_enc(size) @ rd @ 0b0101111 if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
mapping clause encdec = STORECON(aq, rl, rs2, rs1, size, rd) if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))
<-> 0b00011 @ bool_bits(aq) @ bool_bits(rl) @ rs2 @ rs1 @ 0b0 @ size_enc(size) @ rd @ 0b0101111 if extensionEnabled(Ext_Zalrsc) & ((size == BYTE) | (size == HALF))

/*
* Encoding/assembly mappings for capmode specific instructions. This does not
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