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Report CHERI exceptions in xTVAL
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The matches the latest ISA spec and QEMU
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arichardson committed Nov 18, 2020
1 parent 0a3a298 commit afad306
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion src/cheri_addr_checks.sail
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ function handle_cheri_cap_exception(capEx, regnum) =
};
let t : sync_exception = struct {
trap = E_Extension(EXC_CHERI),
excinfo = (None() : option(xlenbits)),
excinfo = Some(EXTZ(regnum @ CapExCode(capEx)) : xlenbits),
ext = Some(cause)
};
set_next_pc(exception_handler(cur_privilege, CTL_TRAP(t), PC))
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