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Support risc-v code models medlow, medany #22517

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iankronquist opened this issue Jan 17, 2025 · 5 comments
Open

Support risc-v code models medlow, medany #22517

iankronquist opened this issue Jan 17, 2025 · 5 comments
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arch-riscv 32-bit and 64-bit RISC-V enhancement Solving this issue will likely involve adding new logic or components to the codebase.
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@iankronquist
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Zig Version

0.13.0

Steps to Reproduce and Observed Behavior

According to the riscv-elf-psabi docs and the GCC risc-v options, RISC-V supports two code models named "Medium Low" aka "medlow" and "Medium Any" or "medany".

When I add the code model option to my build.zig file reproduced below, I get the following error.

    const exe = b.addExecutable(.{
        .name = "kernel.elf",
        .root_source_file = b.path("src/kernel.zig"),
        .target = target,
        .optimize = optimize,
        .code_model = .medlow,
        .strip = false,
    });
% zig build --release=small
.../zig/build.zig:27:21: error: no field named 'medlow' in enum 'builtin.CodeModel'
        .code_model = .medlow,
        ~~~~~~~~~~~~^~~~~~~~~
/opt/homebrew/Cellar/zig/0.13.0/lib/zig/std/builtin.zig:144:23: note: enum declared here
pub const CodeModel = enum {
                      ^~~~

Note that x86 and arm targets don't support these code models, just like risc-v does not support the kernel code model.

Expected Behavior

zig successfully compiles code with these code models.

@iankronquist iankronquist added the bug Observed behavior contradicts documented or intended behavior label Jan 17, 2025
@alexrp
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alexrp commented Jan 17, 2025

We may need to give CodeModel the CallingConvention treatment. cc @mlugg for thoughts.

@mlugg
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mlugg commented Jan 17, 2025

My instinct is that we just need to add more enum variants, but I'll read the resources linked later today and formulate a full opinion.

@mlugg
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mlugg commented Jan 18, 2025

I assume by "the CallingConvention treatment", you mean separating out models per-target?

I don't really see a reason we should do that -- IMO this shouldn't just be modeled with more enum tags. If there were a huge variety of code models in the wild my opinion might differ, but it seems to me that almost all targets have some subset of what we expose right now. My opinion could be swayed if there were several more examples of weird target differences here.

@alexrp
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alexrp commented Jan 18, 2025

Code models are a bit of a mess because they're not always clearly defined in platform ABIs. Sometimes compilers just make some code models up and they become de-facto standardized. Some targets don't use code models at all. Some targets use different naming styles for code models. Etc.

It's worth noting that Clang just maps RISC-V's medlow to LLVM's small and medany to LLVM's medium. (And Zig's code models currently mirror LLVM's.) So that (probably) tells you what a workaround looks like until Zig understands the medlow/medany spellings.

@alexrp
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alexrp commented Jan 18, 2025

For reference, here's what LLVM and Zig understand:

zig/lib/std/builtin.zig

Lines 142 to 149 in 3dadb8c

pub const CodeModel = enum {
default,
tiny,
small,
kernel,
medium,
large,
};

Here's how Clang maps -mcmodel to LLVM code models:

https://github.com/llvm/llvm-project/blob/699f19605579f25083152a9ad21e14c2751d5d66/clang/lib/Driver/ToolChains/CommonArgs.cpp#L2941-L3025

@alexrp alexrp self-assigned this Jan 18, 2025
@alexrp alexrp added this to the 0.15.0 milestone Jan 18, 2025
@alexrp alexrp added arch-riscv 32-bit and 64-bit RISC-V enhancement Solving this issue will likely involve adding new logic or components to the codebase. and removed bug Observed behavior contradicts documented or intended behavior labels Jan 18, 2025
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