No point to use 128 bit code for Arrow lake, any ideas?

[ValeZAA]

Even with the one liner fix, it is still slower, this BTW begs the question whether Intel stole your implementation, hehehehe, good for us common falks though... Lion cove P cores can do 3 multiplication per cycle, maybe that can be used.

└─# clang++-19 -std=c++14 -Os divllu_benchmark.cpp && ./a.out
           hackers      11.0413
        libdiv org      5.5908
        libdiv brn      5.5893
        libdiv nat      1.9302
              divq      1.8921

└─# clang++-19 -std=c++14 -O3 -march=arrowlake divllu_benchmark.cpp && ./a.out
           hackers      10.7452
        libdiv org      5.7449
        libdiv brn      5.7480
        libdiv nat      1.9913
              divq      1.9058

[ridiculousfish]

The purpose of divllu is to implement a narrowing division in software when hardware support is absent. Of course if your CPU implements this natively, then you should use that instead.

x86-64 is unusual in that it directly supports this 128 / 64 => 64 division. I'm not aware of any other ISA which supports this.

[ValeZAA]

Of course if your CPU implements this natively, then you should use that instead.

You know this is not true and on Haswell this happens

       hackers	28.5934
    libdiv org	22.4370
    libdiv brn	21.5763
    libdiv nat	24.6094
          divq	22.5128