This is a base image which includes common EDA tools.
- FuseSoC - Build system and EDA tool orchestration
- Icarus Verilog - verilog simulation
- Verilator - verilog simulation
- Verible - verilog simulation
- Yosys - for verilog synthesis
- cocotb - write verilog testbenchs in python
- pytest - generic python testing framework
- tap.py - python support for TAP
- cocotb: 1.3.1
- FuseSoC: 1.10
- Icarus Verilog: 10.3
- pytest: 5.4.3
- tap.py: 3.0
- Verible: 0.0-440-gb3da8ae
- Verilator: 4.036
- Yosys: 0.9