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\documentclass[a4paper,names,dvipsnames]{article}
\usepackage[T1]{fontenc}
\usepackage[colorinlistoftodos]{todonotes}
\usepackage[inference]{semantic}
\usepackage{mathrsfs}
\usepackage{mathtools}
\usepackage{xcolor}
\usepackage{hyperref}
\usepackage{glossaries}
\usepackage{enumerate}
\usepackage{enumitem}
\usepackage{amsmath}
\usepackage{amsthm}
\usepackage{amssymb}
\usepackage{stmaryrd}
\usepackage{marvosym}
\usepackage{halloweenmath}
\usepackage[capitalize]{cleveref}
\usepackage{bm}
\usepackage{xspace}
\usepackage{etoolbox}
\usepackage{natbib}
\usepackage{xfrac}
\usepackage{graphicx}
\usepackage{adjustbox}
\usepackage{scontents}
\usepackage{comment}
\usepackage{fontawesome5}
% workaround to use extpfeil and stmaryrd together.
% see https://tex.stackexchange.com/questions/297108/
\expandafter\def\csname [email protected]\endcsname
{only,shortleftarrow,shortrightarrow}
\usepackage{extpfeil}
\usepackage{tikz}
\usetikzlibrary{positioning,calc}
\newtheorem{example}{Example}
\newtheorem{definition}{Definition}
\newtheorem{lemma}{Lemma}
\newcounter{theoremcounter}
\newtheorem{theorem}[theoremcounter]{Theorem}
\input{includes}
\makeglossaries
\newcommand{\MK}[1]{}
\newcommand{\MP}[1]{}
% Definition of Ddots
\makeatletter
\def\Ddots{\mathinner{\mkern1mu\raise\p@
\vbox{\kern7\p@\hbox{.}}\mkern2mu
\raise4\p@\hbox{.}\mkern2mu\raise7\p@\hbox{.}\mkern1mu}}
\makeatother
\begin{document}
\tableofcontents
\printglossaries
\clearpage
\section{Preliminaries}
In comparison to the paper, some notation is different.
This document should be considered work-in-progress, we want to make sure both the report and the paper use similar notation.
A non-exhaustive description of differences is: compilers are not $\gamma$, but $\mmlAmmlAtcomp{\bullet}$.
Trace relations are written $\xlangtraceeq{}{}$ or $\tospecificevs{\bullet}$.
\begin{definition}[Events]\label{def:events}
$\events$ is the set of atomic propositions hereby called events or actions.
The internal action is $\emptyevent$.
The action $\terminationevent$ is program termination.
\end{definition}
We assume that any programming language can be enriched with a self-composition operator in the style of \cite{barthe11}.
Furthermore, we also assume the existence of a low-equivalence relation that distinguishes program states only by their public memory.
Two traces $\trace_{1}$,$\trace_{2}$ are low-equivalent $\loweq{\trace_{1}}{\trace_{2}}$ iff all their public events coincide.
\begin{definition}[Programming Languages]\label{def:pl}
A programming language is a tuple $\left(\partials,\wellf,\singlestep,\linker\right)$ s.t.:
\begin{itemize}
\item[$\partials$] : Set - is a set of admissible, partial programs.
\item[$\wellf$] : $\partials$ - a judgement that holds iff a program is not partial.
\item[$\singlestep$] : $\wholes\to\events\to\wholes$ - a step relation, where $\wholes=\{w\in\partials\ |\ \wellf w\}$.
For $e\in\events$ and $p,p'\in\wholes$ we say for $\estep{p}{e}{p'}$ that program $p$ performs a step with action $e$ to program $p'$.
If $e=\emptyevent$, we write $\step{p}{p'}$.
In case $e=\terminationevent$, we write $\terminates{p}$.
\item[$\linker$] : $\partials\to\partials\to\partials$ - links two partial programs together in some way, resulting in a new partial program.
\end{itemize}
\end{definition}
Let $\src{S},\irl{I},$ and $\trg{T}$ be any programming language.
% if we get τ1 and τ2, then there is aontehr program that does τ3 which does τ1 and τ2 in parallel
% define self-composition. and then define it with respect to low-equivalent programs
%
\begin{definition}[Notation for Sequences]
For any sequence of events, let $\seqnil$ denote the empty sequence and $\seqcons{e}{\bar{t}}$ the sequence that starts with $e$ and continues with $\bar{t}$.
Hereby, it does not matter whether $\bar{t}$ is finite or infinite, it's merely syntactic sugar to work on sequences of events.
\end{definition}
\begin{definition}[Traces]
A trace $\trace$ is an infinite sequence of events that results from the relation $\singlestep$.
That is, we obtain the trace $\trace=\seqcons{e_{0}}{\seqcons{e_{1}}{\dots}}$ for the execution sequence $\estep{p}{e_{0}}{\estep{p'}{e_{1}}{\dots}}$ and write $\mktrace{p}{\trace}$.
The set of all traces is $\traces$.
\end{definition}
\noindent
We assume $\lightning$ to occur in traces representing terminating programs such that it occurs infinitely often in a one-by-one sequence.
\begin{definition}[Once]
Given an event $\event$ and a trace $\trace$, we say $\event$ appears exactly once in the trace, written $\event\in_{!}\trace$, iff
If $n\in\nat$ such that $\trace{[n]}=\event$, then for any $m\in\nat$ such that $\trace{[m]}=\event$ we have $n = m$.
\end{definition}
\begin{definition}[Before]
Given two events $\event[_0],\event[_1]$ and a trace $\trace$, event $\event[_0]$ occurs before $\event[_1]$ in $\trace$, written
$\event{_0}\le_{\trace}\event{_1}$, iff
If $n\in\nat$ such that $\trace{[n]} = \event[_{0}]$, then $\exists m\in\nat, \trace{[m]} = \event[_1] \wedge n< m$
\end{definition}
\begin{definition}[Finite Trace Prefixes]
A finite sequence of events $m$ is a finite trace prefix of $\trace$ iff it satisfies the following judgement.
$$
\inference{}{\cdot\le\trace}\hspace{2em}\inference{m\le\trace}{\seqcons{e}{m}\le \seqcons{e}{\trace}}
$$
\end{definition}
\begin{definition}[Behavior]
The behavior of a whole program $p$ is a set of all traces it produces, i.e. $\behav{p}=\{\trace\ |\ \mktrace{p}{\trace}\}$.
\end{definition}
\begin{definition}[Observation]
An observation is a finite set of finite trace prefixes.
We say that an observation $o$ is the prefix of a behavior $b$ iff $$\forall m\in o.\exists \trace\in b.m\le t$$.
\end{definition}
\begin{definition}[Properties]
A property $\prop$ is a set of admissible traces. For a program $p$ to satisfy $\prop$ it must not produce a trace that is not part of $\prop$. Thus, $p$ satisfies $\prop$ iff $\behav{p}\subseteq\prop$ and we write $\sat{p}{\prop}$.
\end{definition}
\begin{definition}[Hyperproperties]
A hyperproperty $H$ is a set of admissible sets of traces. Thus, if $p$ satisfies $H$ (also written $\sat{p}{H}$), then $\behav{p}\in H$.
\end{definition}
\begin{lemma}[Lifting Properties]
Given a property $\pi$, there exists a unique hyperproperty $\lift{\pi}$ that satisfies the exact same policy.
\end{lemma}
\begin{proof}
We want $\forall p \in\partials, \sat{p}{\prop}\equiv\sat{p}{\lift{\prop}}$.
Henceforth, given a $p\in\partials$, we have $\behav{p}\subseteq\prop$ iff $\behav{p}\in\lift{\prop}$.
Note that if $\behav{p}\subseteq\prop$, we have $\behav{p}\in\left\{\Pi\ |\ \Pi=\behav{p}\subseteq\prop\right\}$.
Thus, $\lift{\prop}$ is the set of all possible program behaviors that are a subset of $\prop$.
This is exactly the powerset of $\prop$ and we conclude $\lift{\prop}=\powerset{\prop}$.
\end{proof}
\noindent
The lifting of properties to a singleton set does not suffice, since the empty behavior trivially satisfies any property $\emptyset\subseteq\prop=\{\trace\}$, but if we would define $\lift{\trace}=\{\{\trace\}\}$, then $\emptyset\not\in\lift{\trace}$.
\begin{lemma}[Property Satisfaction Refinement]
For a property $\prop$ that refines $\prop'$, i.e. $\prop\subseteq\prop'$, if any $p\in\partials$ satisfies $\sat{p}{\prop'}$, then $\sat{p}{\prop}$.
\end{lemma}
\begin{proof}
Pick any property $\prop'$ and $p\in\partials$ such that $\sat{p}{\prop}$ and assume $\prop\subseteq\prop'$.
Simple unfolding reveals $\behav{p}\subseteq\prop\implies\behav{p}\subseteq\prop'$.
\end{proof}
\noindent
For lifted properties, this refinement property also holds on the hyperproperty level.
However, it does not work for any hyperproperty~\cite{clarkson08}.
\begin{definition}[Robust Property Satisfaction]
A program $p$ robustly satisfies a property $\prop$, written $\rsat{p}{\prop}$, iff $\forall C\in\partials,\sat{C\linker p}{\prop}$. The same notation is used for robust hyperproperty satisfaction.
\end{definition}
\begin{lemma}[Weakening Robust Satisfaction]\label{lem:weaken-rsat}
Given classes $\cC_{1}, \cC_{2}$ and any program $p$ such that
\begin{assumptions}
\item\label{lem:weaken-rsat:ass:a} $\cC_{1}\subseteq\cC_{2}$
\item\label{lem:weaken-rsat:ass:b} $\rsat{p}{\cC_{2}}$
\end{assumptions}
We show
\begin{goals}
\item\label{lem:weaken-rsat:goal:i} $\rsat{p}{\cC_{1}}$
\end{goals}
\end{lemma}
\begin{proof}
Unfolding \Thmref{lem:weaken-rsat:goal:i}, let $\Pi\in\cC_{2}$ and $p$ be a program, we want to show that $\rsat{p}{\Pi}$.
By \Thmref{lem:weaken-rsat:ass:a}, we also know that $\Pi\in\cC_{1}$.
Thus, we can use \Thmref{lem:weaken-rsat:ass:b} to conclude.
\end{proof}
\begin{definition}[Classes]
A class of hyperproperties $\cC$ is a set of hyperproperties.
Likewise, a class of properties $\cC$ is a set of hyperproperties, where every property is lifted to the hyperproperty level.
From now on, we use $\Pi$ for elements of any class $\cC$ in case it does not matter whether it is a lifted property or any hyperproperty.
\end{definition}
\begin{definition}[Compilers]
A compiler between languages $\S$ and $\T$ is a partial function $\stcomp{\bullet}$ from $\src{\partials}$ to $\trg{\partials}$.
\end{definition}
\section{Compositionality of Secure Compilers}
\begin{definition}[Universal Image]\label{def:sigma}
\[
\sigma_{\sim}(\trg{\pi}) = \left\{ \src{\trace} | \forall\trg{\trace},\src{\trace}\sim\trg{\trace}\implies\trg{\trace}\in\trg{\pi}\right\}
\]
\end{definition}
\begin{definition}[Existential Image]\label{def:tau}
\[
\tau_{\sim}(\src{\pi}) = \left\{ \trg{\trace} | \exists\src{\trace},\src{\trace}\sim\trg{\trace}\wedge\src{\trace}\in\src{\pi}\right\}
\]
\end{definition}
\begin{definition}[Robust Trace-Hyperproperty Preservation with Universal Image]\label{def:rtp:sigma}
For a given class $\trg{\cC}$, a compiler from languages $\S$ to $\T$ robustly preserves $\trg{\cC}$ iff
$$
\forall\trg{\Pi}\in\trg{\cC},\forall\src{p}\in\src{\partials},\rsat{\src{p}}{\sigma_{\sim}(\trg{\Pi})}\implies\rsat{\stcomp{\src{p}}}{\trg{\Pi}}
$$
We write $\rtpsigma{\stcomp{\bullet}}{\trg{\cC}}$.
\end{definition}
\begin{definition}[Robust Trace-Hyperproperty Preservation with Existential Image]\label{def:rtp:tau}
For a given class $\cC$, a compiler from languages $\S$ to $\T$ robustly preserves $\src{\cC}$ iff
$$
\forall\src{\Pi}\in\src{\cC},\forall\src{p}\in\src{\partials},\rsat{\src{p}}{\src{\Pi}}\implies\rsat{\stcomp{\src{p}}}{\tau_{\sim}(\src{\Pi})}
$$
We write $\rtptau{\stcomp{\bullet}}{\src{\cC}}$.
\end{definition}
\begin{definition}[Robust Trace-Hyperproperty Preservation]\label{def:rtp}
For a given class $\cC$, a compiler from languages $\S$ to $\T$ robustly preserves $\cC$ iff
$$
\forall\Pi\in\cC,\forall\src{p}\in\src{\partials},\rsat{\src{p}}{\Pi}\implies\rsat{\stcomp{\src{p}}}{\Pi}
$$
We write $\rtp{\stcomp{\bullet}}{\cC}$.
\end{definition}
\begin{definition}[Sequential Composition of Compilers]
Given two compilers $\sicomp{\bullet}$ and $\itcomp{\bullet}$, their sequential composition is $\sitcomp{\bullet}=\itcompN{\sicomp{\bullet}}$.
\end{definition}
% we can propagate through the assumptions from src langs to intermediate langs
%
\begin{lemma}[Weakening RTP]\label{lem:weaken}
Given classes $\cC_{1}, \cC_{2}$ such that
\begin{assumptions}
\item $\cC_{1}\subseteq\cC_{2}$
\item $\rtp{\stcomp{\bullet}}{\cC_{2}}$
\end{assumptions}
We show
\begin{goals}
\item $\rtp{\stcomp{\bullet}}{\cC_{1}}$
\end{goals}
\end{lemma}
\begin{proof}
Using \Cref{def:rtp} on the goal, let $\Pi\in\cC_{1}$ and $\src{p}\in\src{\partials}$ such that $\rsat{\src{p}}{\Pi}$, so what's left to prove is $\rsat{\stcomp{p}}{\Pi}$.
Since $\cC_{1}\subseteq\cC_{2}$ and $\Pi\in\cC_{1}$, we know that $\Pi\in\cC_{2}$.
Thus, we can apply the assumption $\rtp{\stcomp{\bullet}}{\cC_{2}}$ to our goal, leaving us with $\rsat{\src{p}}{\Pi}$ to show, which was an assumption we made.
\end{proof}
\begin{definition}[Well-formedness of $\sim$ for a Class $\src{\cC}$]\label{def:wfc:tau:tracerel}
% $$
\[
\wfctau{\sim}{\src{\cC}} := \forall \src{\pi}\in\src{\cC}, \tau_{\sim}(\src{\pi})\in\tau_{\sim}(\src{\cC})
\]
% $$
\end{definition}
\begin{definition}[Well-formedness of $\sim$ for a Class $\trg{\cC}$]\label{def:wfc:sig:tracerel}
% $$
\[
\wfcsig{\sim}{\trg{\cC}} := \forall \trg{\pi}\in\trg{\cC}, \sigma_{\sim}(\trg{\pi})\in\sigma_{\sim}(\trg{\cC})
\]
% $$
\end{definition}
\begin{definition}[Safety Properties]
The class of safety properties contains the lifting of all properties that can be refuted with a finite trace prefix:
$$
\cSafety = \left\{\lift{\prop}\ |\ \forall \trace\in\traces, t\not\in\lift{\prop} \text{ iff } \exists m\ge\trace,\forall \trace'\in\traces,m\le\trace'\implies\trace'\not\in\lift{\prop}\right\}
$$
\end{definition}
\begin{definition}[Hypersafety Properties]\label{def:hsafety}
The class of hypersafety properties contains all hyperpropert that can be refuted with an observation:
$$
\cHSafety = \left\{\Pi\ |\ \forall b\in 2^{\traces},b\not\in\Pi\text{ iff }\exists o\ge b,\forall b'\in 2^{\traces},o\le b'\implies b'\not\in\Pi\right\}
$$
\end{definition}
\begin{definition}[Subset Closed Hyperproperties]
The class of hyperproperties that are closed with respect to the subset relation is
$$
\cSS = \left\{H\ |\ \forall X\in H, \forall Y\subseteq X, Y \in H\right\}
$$
\end{definition}
\begin{lemma}[Hypersafety is entailed in SSC]
$\cHSafety\subseteq\cSS$.
\end{lemma}
\begin{proof}
\cite{clarkson08}
\end{proof}
\begin{definition}[K-Hypersafety]
Exactly the same as \Cref{def:hsafety}, but the observations $o$ are restricted to cardinality $k$.
2-Hypersafety is simply $k=2$. \Cref{def:ni} gives an example instance of a classic 2-hypersafe property.
\end{definition}
\begin{definition}[Non-Interference ($\Ni$)]\label{def:ni}
We define the class containing the non-interference hyperproperty as:
$$
\Ni = \left\{ H | \forall \trace_{1},\trace_{2}\in H. \loweq{\trace_{1}}{\trace_{2}}\implies\trace_{1}=\trace_{2} \right\}
$$
\end{definition}
Note that $=$ may not be strict equality, but some suitable trace equivalence that checks both public and private actions, instead of just public.
\section{Composition of Previous Results}
\begin{lemma}[Sequential Composition with RTP$\tau$]\label{lem:seqcompo:tau}
Given $\wfctau{\sim_1}{\src{\cC_2}}$, $\rtptau[\sim_1]{\sicomp{\bullet}}{\src{\cC_{1}}}$, and $\rtptau[\sim_2]{\itcomp{\bullet}}{\tau_{\sim_1}(\src{\cC_{2}})}$, then $\rtptau[\sim_1\circ\sim_2]{\sitcomp{\bullet}}{\src{\cC_{1}}\cap\src{\cC_{2}}}$.
\end{lemma}
\begin{proof}
We need to show $\rtptau[\sim_1\circ\sim_2]{\sitcomp{\bullet}}{\src{\cC_{1}}\cap\src{\cC_{2}}}$.
By definition, assume $\src{\pi}\in\src{\cC_{1}}\cap\src{\cC_{2}}$ and $\src{p}\in\src{\partials}$ such that $\rsat{\src{p}}{\src{\pi}}$.
What is left to show is $\rsat{\sitcomp{\src{p}}}{\tau_{\sim_1\circ\sim_2}(\src{\pi})}$.
Note that $\src{\pi}\in\src{\cC_{1}}$ as well as $\src{\pi}\in\src{\cC_2}$.
Also, $\sicomp{\src{p}}\in\irl{\partials}$ and $\tau_{\sim_1\circ\sim_2}(\src{\pi})=\tau_{\sim_2}(\tau_{\sim_1}(\src{\pi}))$.
Since $\sim_1$ is well-formed with respect to $\src{\cC_2}$, we can apply $\rtptau[\sim_2]{\itcomp{\bullet}}{\tau_{\sim_1}(\src{\cC_{2}})}$, changing our goal to $\rsat{\sicomp{\src{p}}}{\tau_{\sim_1}(\src{\pi})}$.
Since $\src{\pi}\in\src{\cC_{1}}$ also holds, we can this time apply $\rtptau[\sim_1]{\stcomp{\bullet}}{\src{\cC_{1}}}$.
What is left to show is $\rsat{\src{p}}{\src{\pi}}$, which is an assumption of ours.
\end{proof}
\begin{lemma}[Sequential Composition with RTP$\sigma$]\label{lem:seqcompo:sigma}
Given $\wfcsig{\sim_2}{\trg{\cC_1}}$, $\rtpsigma[\sim_1]{\sicomp{\bullet}}{\sigma_{\sim_2}(\trg{\cC_{1}})}$, and $\rtpsigma[\sim_2]{\itcomp{\bullet}}{\trg{\cC_{2}}}$, then $\rtpsigma[\sim_1\circ\sim_2]{\sitcomp{\bullet}}{\trg{\cC_{1}}\cap\trg{\cC_{2}}}$.
\end{lemma}
\begin{proof}
Dual to \Cref{lem:seqcompo:tau}.
\end{proof}
\begin{lemma}[Sequential Composition with RTP]\label{lem:seqcompo}
Given $\rtp{\sicomp{\bullet}}{\cC_{1}}$ and $\rtp{\itcomp{\bullet}}{\cC_{2}}$, then $\rtp{\sitcomp{\bullet}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Simple consequence from either \Cref{lem:seqcompo:tau} or \Cref{lem:seqcompo:sigma} by setting the cross-language trace relations to =.
\end{proof}
\begin{definition}[Upper Composition]
Given two compilers $\stcomp{\bullet}$ and $\itcomp{\bullet}$, their upper composition is
$$\uhcsitcomp{\bullet}=\lambda p.\begin{cases}\stcomp{p} &\text{if }p\in\src{\partials}\\
\itcomp{p} &\text{if }p\in\irl{\partials}\end{cases}$$.
\end{definition}
\begin{lemma}[Upper Composition with RTP]
Given $\rtp{\stcomp{\bullet}}{\cC_{1}}$ and $\rtp{\itcomp{\bullet}}{\cC_{2}}$, then $\rtp{\uhcsitcomp{\bullet}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Analogous argument as in \Thmref{lem:seqcompo}, but with a case distinction on whether the source program is element of $\S$ or $\I$.
\end{proof}
% S = while, I = while with exceptions => modularization
% another idea: certified nugget -> minimal RSP compiler
\begin{definition}[Lower Composition]
Given two compilers $\stcomp{\bullet}$ and $\sicomp{\bullet}$, their lower composition is $\lhcsitcomp{\bullet}$.
\end{definition}
\begin{lemma}[Lower Composition with RTP]
Given $\rtp{\stcomp{\bullet}}{\cC_{1}}$ and $\rtp{\sicomp{\bullet}}{\cC_{2}}$, then $\rtp{\lhcsitcomp{\bullet}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Analogous argument as in \Thmref{lem:seqcompo}, but with a case distinction on whether the compiled source program is element of $\I$ or $\T$.
\end{proof}
\begin{lemma}[Diamond]\label{lem:diamond}
Given $\rtp{\lhcsiocomp{\bullet}}{\cC_{1}}$ and $\rtp{\uhciotcomp{\bullet}}{\cC_{2}}$ with $\stcomp{\bullet} = \lambda\src{p}.\uhciotcomp{\lhcsiocomp{p}}$, then $\rtp{\stcomp{\bullet}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Straightforward using \Thmref{lem:seqcompo}.
\end{proof}
\begin{lemma}[Swappable]\label{lem:swappable}
Given $\rtp{\ttcomp{\bullet}_{(1)}}{\cC_{1}}$ and $\rtp{\ttcomp{\bullet}_{(2)}}{\cC_{2}}$, then $\rtp{\ttcompN{\ttcomp{\bullet}_{(2)}}_{(1)}}{\cC_{2}\cap\cC_{1}}$ and $\rtp{\ttcompN{\ttcomp{\bullet}_{(1)}}_{(2)}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Both follow from \Thmref{lem:seqcompo}.
\end{proof}
\begin{lemma}[Swappable$\sigma$]\label{lem:swappable:sigma}
Given $\wfcsig{\sim_2}{\trg{\cC_1}}$, $\wfcsig{\sim_1}{\trg{\cC_2}}$, $\rtpsigma[\sim_1]{\ttcomp{\bullet}_{(1)}}{\trg{\cC_{1}}}$, $\rtpsigma[\sim_1]{\ttcomp{\bullet}_{(1)}}{\sigma_{\sim_2}(\trg{\cC_1})}$, $\rtpsigma[\sim_2]{\ttcomp{\bullet}_{(2)}}{\sigma_{\sim_1}(\trg{\cC_{2}})}$, and $\rtpsigma[\sim_2]{\ttcomp{\bullet}_{(2)}}{\trg{\cC_{2}}}$, then $\rtpsigma[\sim_1\circ\sim_2]{\ttcompN{\ttcomp{\bullet}_{(2)}}_{(1)}}{\cC_{2}\cap\cC_{1}}$ and $\rtpsigma[\sim_2\circ\sim_1]{\ttcompN{\ttcomp{\bullet}_{(1)}}_{(2)}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Easy from \Thmref{lem:seqcompo:sigma}.
\end{proof}
\begin{lemma}[Swappable$\tau$]\label{lem:swappable:tau}
Given $\wfctau{\sim_2}{\trg{\cC_1}}$, $\wfctau{\sim_1}{\trg{\cC_2}}$, $\rtptau[\sim_1]{\ttcomp{\bullet}_{(1)}}{\trg{\cC_{1}}}$, $\rtptau[\sim_1]{\ttcomp{\bullet}_{(1)}}{\tau_{\sim_2}(\trg{\cC_1})}$, $\rtptau[\sim_2]{\ttcomp{\bullet}_{(2)}}{\tau_{\sim_1}(\trg{\cC_{2}})}$, and $\rtptau[\sim_2]{\ttcomp{\bullet}_{(2)}}{\trg{\cC_{2}}}$, then $\rtptau[\sim_1\circ\sim_2]{\ttcompN{\ttcomp{\bullet}_{(2)}}_{(1)}}{\cC_{2}\cap\cC_{1}}$ and $\rtptau[\sim_2\circ\sim_1]{\ttcompN{\ttcomp{\bullet}_{(1)}}_{(2)}}{\cC_{1}\cap\cC_{2}}$.
\end{lemma}
\begin{proof}
Easy from \Thmref{lem:seqcompo:tau}.
\end{proof}
\section{Case Study}
\subsection{Specification Language}
We introduce a set of actions that allows us to describe properties abstractly instead of a language specific manner.
\myfig{
\begin{gather*}
\begin{aligned}
\mi{Control\ Tag}~\sandboxtag\bnfdef&\ \ctx \mid \comp \hspace{0.5cm}
\mi{Security\ Tag}~\specificev{\sigma} \bnfdef\ \specificev{\lock} \mid \specificev{\unlock} \\
\mi{Pre\text{--}Events}~\msevent_{b} \bnfdef&\ \specificev{Alloc\ \loc\ n} \mid \specificev{Dealloc\ \loc} \mid \specificev{Use\ \loc\ n} \mid \specificev{Branch\ n} \mid \specificev{Binop\ n} \\
\mi{Events}~\msevent \bnfdef&\ \specificev{\emptyevent}\mid \specificev{\lightning} \mid \specificev{\msevent_{b}};\sandboxtag;\specificev{\sigma} \\
\end{aligned}
\end{gather*}
}{w-specific-events}{Specification Events.}
\begin{definition}[\glsfirst*{tms}]\label{def:tms}\label{def:tempmemsafe}
$$
\text{tms}:=\left\{\trace[_{\mssafe}] \left| \begin{array}{rcl}
\specificev{Alloc\ \loc\ n}&\le_{\trace[_{\mssafe}]}&\specificev{Dealloc\ \loc} \\
\specificev{Use\ \loc\ n}&\le_{\trace[_{\mssafe}]}&\specificev{Dealloc\ \loc} \\
\specificev{Dealloc\ \loc}&\in_{!}&\trace[_{\mssafe}] \\
\specificev{Alloc\ \loc\ n}&\in_{!}&\trace[_{\mssafe}] \\
\end{array}\right.\right\}
$$
\end{definition}
\subsubsection{\gls*{tms} Monitor}
In order to just talk about temporal memory safety, we introduce a monitor that works on more abstract monitor-actions, without any other events besides those relevant to temporal memory safety.
\myfig{
\begin{gather*}
\begin{aligned}
\mi{Abstract\ Store}~\tmsmonitor =&\{A : \specificev{L}\times\sandboxtag, F : \specificev{L}\times\sandboxtag\} \\
\mi{Abstract\ Events}~\absevent \bnfdef&\ \bm{\varepsilon} \mid \textbf{Alloc}\ \specificev{\loc}\ \sandboxtag \mid \textbf{Dealloc}\ \specificev{\loc}\ \sandboxtag \mid \textbf{Use}\ \specificev{\loc}\ \sandboxtag \mid \abstermination\\[0.3cm]
\tmsmonitor\subseteq_F \tmsmonitor['] &\text{ iff } \tmsmonitor[.F] \subseteq \tmsmonitor['.F]\\
\absevent\in \tmsmonitor &\text{ iff } \absevent \in {\tmsmonitor[.A]} \wedge \absevent \notin {\tmsmonitor[.F]}\\
\absevent\notin \tmsmonitor &\text{ iff } \absevent \notin {\tmsmonitor[.A]} \wedge \absevent \notin {\tmsmonitor[.F]}\\
\{(\specificev{\loc};\sandboxtag)\}\cup \tmsmonitor &= \{A : \{(\specificev{\loc};\sandboxtag)\}\cup \tmsmonitor[.A], F : \tmsmonitor[.F]\}\\
\tmsmonitor\setminus\{(\specificev{\loc};\sandboxtag)\} &= \{A : \tmsmonitor[.A]\setminus\{(\specificev{\loc};\sandboxtag)\}, F : \tmsmonitor[.F]\cup\left\{(\specificev{\loc};\sandboxtag)\right\}\}\\
\tmsmonitor\cup \tmsmonitor' &= \{A : \tmsmonitor[.A]\cup \tmsmonitor['.A], F : \tmsmonitor[.F]\cup \tmsmonitor['.F]\}\\
\end{aligned}
\end{gather*}
}{tms-monitor}{\gls{tms} Monitor.}
As before, when doing structural induction over primitive steps (\Cref{fig:w-expr-prim-eval}) we may encounter the $\src{\emptyevent}$, for which $\tospecificevs{\emptyevent}=\specificev{\emptyevent}$, which needs a ,,partner'' in the abstract events as defined in \Cref{fig:tms-monitor}: $\bm{\varepsilon}$.
\myfig{
\begin{center}
\judgbox{\monitorcheck[]{\tmsmonitor}{\tmsmonitor[']}{\absevent}}{,,Given abstract state $\tmsmonitor$, step to abstract state $\tmsmonitor'$\\ emitting an abstract event $\absevent$.''}
\judgbox{\monitorcheck{\tmsmonitor}{\tmsmonitor[']}{\abstrace}}{,,Reflexive-Transitive closure of above judgement.\\$\abstrace$ is a list of abstract events.''}
\typerule{TMS-Uninteresting}{
}{
\monitorcheck[]{\tmsmonitor}{\tmsmonitor}{\bm{\varepsilon}}
}{tms-uninteresting}
%
\typerule{TMS-Abort}{
}{
\monitorcheck[]{\tmsmonitor}{\tmsmonitor}{\bm{\lightning}}
}{tms-abort}
%
\typerule{TMS-Use}{
(\specificev{\loc};\sandboxtag)\in \tmsmonitor
}{
\monitorcheck[]{\tmsmonitor}{\tmsmonitor}{\textbf{Use}\ \specificev{\loc}\ \sandboxtag}
}{tms-use}
%
\typerule{TMS-Alloc}{
\tmsmonitor[']=\left\{(\specificev{\loc};\sandboxtag)\right\}\cup\tmsmonitor&
(\specificev{\loc};\sandboxtag)\notin \tmsmonitor
}{
\monitorcheck[]{\tmsmonitor}{\tmsmonitor[']}{\textbf{Alloc}\ \specificev{\loc}\ \sandboxtag}
}{tms-alloc}
%
\typerule{TMS-Dealloc}{
(\specificev{\loc};\sandboxtag)\in \tmsmonitor &
\tmsmonitor[']=\tmsmonitor\setminus\left\{(\specificev{\loc};\sandboxtag)\right\}
}{
\monitorcheck[]{\tmsmonitor}{\tmsmonitor[']}{\textbf{Dealloc}\ \specificev{\loc}\ \sandboxtag}
}{tms-dealloc}
%
\typerule{TMS-Refl}{
\tmsmonitor[.A]=\emptyset
}{
\monitorcheck{\tmsmonitor}{\tmsmonitor}{\hole{\cdot}}
}{tms-refl}
%
\typerule{TMS-Trans}{
\monitorcheck[]{\tmsmonitor}{\tmsmonitor[']}{\absevent}&
\monitorcheck{\tmsmonitor[']}{\tmsmonitor['']}{\abstrace}&
}{
\monitorcheck{\tmsmonitor}{\tmsmonitor['']}{\absevent\cdot\abstrace}
}{tms-trans}
\end{center}
}{tms-step}{Steps of \gls{tms} Monitor.}
The monitor-state contains two sets of locations that represent the ones that are active and the ones that have been deallocated, respectively.
As seen in \Cref{tr:tms-dealloc}, the monitor only steps if the intuitive condition is true: a location can only be deallocated if it is part of the set of allocated locations.
\Cref{tr:tms-use} ensures that only allocated locations occur in events representing usage, the monitor cannot step if the location has been deallocated before.
As before, we need a way to translate one set of actions to another:
\myfig{
\begin{center}
\judgbox{\tmstraceagree{\msevent}{\absevent}}{,,Memory-Safety specific event $\msevent$ describes same action as $\absevent$.''}
%
\typerule{TMS-Alloc-Authentic}{
}{
\tmstraceagree{\specificev{Alloc\ \loc\ n};\sandboxtag;\specificev{\sigma}}{\textbf{Alloc}\ \specificev{\loc}\ \sandboxtag}
}{tms-alloc-auth}
%
\typerule{TMS-Dealloc-Authentic}{
}{
\tmstraceagree{\specificev{Dealloc\ \loc};\sandboxtag;\specificev{\sigma}}{\textbf{Dealloc}\ \specificev{\loc}\ \sandboxtag}
}{tms-dealloc-auth}
%
\typerule{TMS-Use-Authentic}{
}{
\tmstraceagree{\specificev{Use\ \loc\ n};\sandboxtag;\specificev{\sigma}}{\textbf{Use}\ \specificev{\loc}\ \sandboxtag}
}{tms-use-auth}
%
\typerule{TMS-Abort-Authentic}{
}{
\tmstraceagree{\specificev{\lightning}}{\bm{\lightning}}
}{tms-abort-auth}
%
\typerule{TMS-None-Authentic}{
}{
\tmstraceagree{\specificev{\varepsilon}}{\bm{\varepsilon}}
}{tms-none-auth}
%
\typerule{TMS-Branch-Authentic}{
}{
\tmstraceagree{\specificev{Branch\ n};\sandboxtag;\specificev{\sigma}}{\bm{\varepsilon}}
}{tms-branch-auth}
%
\typerule{TMS-Binop-Authentic}{
}{
\tmstraceagree{\specificev{Binop\ n};\sandboxtag;\specificev{\sigma}}{\bm{\varepsilon}}
}{tms-binop-auth}
%
\judgbox{\tmstraceagree[^*]{\mstrace}{\abstrace}}{,,Memory-Safety specific trace $\mstrace$ describes same trace as $\abstrace$.''}
%
\typerule{TMS-Refl-Authentic}{
}{
\tmstraceagree[^*]{\hole{\cdot}}{\hole{\cdot}}
}{tms-refl-auth}
%
\typerule{TMS-Trans-Authentic}{
\tmstraceagree{\msevent}{\absevent} &
\tmstraceagree[^*]{\mstrace}{\abstrace}
}{
\tmstraceagree[^*]{\msevent\cdot\mstrace}{\absevent\cdot\abstrace}
}{tms-trans-auth}
%
\typerule{TMS-Trans-Authentic-Lign}{
\tmstraceagree[^*]{\mstrace}{\abstrace}
}{
\tmstraceagree[^*]{\specificev{\emptyevent}\cdot\mstrace}{\abstrace}
}{tms-trans-auth-lign}
%
\typerule{TMS-Trans-Authentic-Rign}{
\tmstraceagree[^*]{\mstrace}{\abstrace}
}{
\tmstraceagree[^*]{\mstrace}{\bm{\emptyevent}\cdot\abstrace}
}{tms-trans-auth-rign}
\end{center}
}{tms-trace-agreement}{Trace Agreement.}
\begin{definition}[Trace is temporal memory safe via monitor.]\label{def:src:trace:tms}
We say $\texttt{TMS}(\mstrace)$ iff $\exists \delta_{\text{tms}}\ \abstrace\ \tmsmonitor$ such that:
\begin{itemize}
\item $\tmstraceagree{\mstrace}{\abstrace}$
\item and $\monitorcheck{\emptyset}{\tmsmonitor}{\abstrace}$
\end{itemize}
\end{definition}
\begin{lemma}[$\texttt{TMS}(\mstrace)$ implies $\mstrace\in\operatorname{tmsafe}$]\label{lem:tmssafe-tracetms}
If
\begin{assumptions}
\item\label[ass]{asm:tmssafe-tracetms:tms} $\texttt{TMS}(\mstrace)$
\end{assumptions}
Then
\begin{goals}
\item $\mstrace\in\operatorname{tmsafe}$
\end{goals}
\end{lemma}
\begin{proof}
Invert \Cref{asm:tmssafe-tracetms:tms}:
\begin{passumptions}{H}
\item\label[ass]{asm:tmssafe-tracetms:traceag} $\tmstraceagree{\mstrace}{\abstrace}$
\item\label[ass]{asm:tmssafe-tracetms:monstep} $\monitorcheck{\emptyset}{\tmsmonitor}{\abstrace}$
\end{passumptions}
The proof follows with an induction on \Cref{asm:tmssafe-tracetms:monstep}.
\end{proof}
\subsubsection{\gls*{sms} Monitor}
\myfig{
\begin{gather*}
\begin{aligned}
\mi{Abstract\ Store}~\smsmonitor =&\ \specificev{L}\times\sandboxtag\times\nat \\
\mi{Abstract\ Events}~\absevent \bnfdef&\ \bm{\varepsilon}\mid \textbf{Alloc}\ \specificev{\loc}\ \sandboxtag\ \bm{n} \mid \textbf{Use}\ \specificev{\loc}\ \sandboxtag\ \bm{n} \mid \abstermination\\
\end{aligned}
\end{gather*}
}{sms-monitor}{\gls{sms} Monitor.}
\begin{definition}[\glsfirst*{sms}]\label{def:trace:smsdef}\label{def:sms}\label{def:spatmemsafe}
% \small
% \begin{nscenter}
\noindent
\[
\smssafe:=\left\{\trace[_{\mssafe}] \left|\begin{array}{rcl}
\text{If }\specificev{Alloc\ \loc\ n}\le_{\trace_{\mssafe}}\specificev{Use\ \loc\ m}, \text{ then }m<n
\end{array}\right.\right\}
\]
% \end{nscenter}
\end{definition}
\myfig{
\begin{center}
\judgbox{\monitorcheck[]{\smsmonitor}{\smsmonitor[']}{\absevent}}{,,Given abstract state $\smsmonitor$, step to abstract state $\smsmonitor'$\\ emitting an abstract event $\absevent$.''}
\judgbox{\monitorcheck{\smsmonitor}{\smsmonitor[']}{\abstrace}}{,,Reflexive-Transitive closure of above judgement.\\$\abstrace$ is a list of abstract events.''}
%
\typerule{sms-None}{
}{
\monitorcheck[]{\smsmonitor}{\smsmonitor}{\bm{\varepsilon}}
}{sms-none}
%
\typerule{sms-Abort}{
}{
\monitorcheck[]{\smsmonitor}{\smsmonitor}{\bm{\lightning}}
}{sms-abort}
%
\typerule{sms-Use}{
(\specificev{\loc};\sandboxtag;m) \in \smsmonitor&
n < m
}{
\monitorcheck[]{\smsmonitor}{\smsmonitor}{\textbf{Use}\ \loc\ \sandboxtag\ \bm{n}}
}{sms-use}
%
\typerule{sms-Alloc}{
(\specificev{\loc};\sandboxtag;m) \notin \text{dom }\smsmonitor
}{
\monitorcheck[]{\smsmonitor}{\smsmonitor\cup\left\{(\specificev{\loc};\sandboxtag;n)\right\}}{\textbf{Alloc}\ \specificev{\loc}\ \sandboxtag\ \bm{n}}
}{sms-alloc}
%
\typerule{sms-Refl}{
}{
\monitorcheck{\smsmonitor}{\smsmonitor}{\hole{\cdot}}
}{sms-refl}
%
\typerule{sms-Trans}{
\monitorcheck[]{\smsmonitor}{\smsmonitor[']}{\absevent}&
\monitorcheck{\smsmonitor[']}{\smsmonitor['']}{\abstrace}
}{
\monitorcheck{\smsmonitor}{\smsmonitor['']}{\absevent\cdot\abstrace}
}{sms-trans}
\end{center}
}{sms-step}{Steps of \gls{sms} Monitor.}
\myfig{
\begin{center}
\judgbox{\smstraceagree{\msevent}{\absevent}}{,,Memory-Safety specific event $\msevent$ describes same action as $\absevent$.''}
%
\typerule{SMS-Alloc-Authentic}{
}{
\smstraceagree{\specificev{Alloc\ \loc\ n};\sandboxtag;\specificev{\sigma}}{\textbf{Alloc}\ \specificev{\loc}\ \sandboxtag\ \bm{n}}
}{sms-alloc-auth}
%
\typerule{SMS-Dealloc-Authentic}{
}{
\smstraceagree{\specificev{Dealloc\ \loc};\sandboxtag;\specificev{\sigma}}{\bm{\emptyevent}}
}{sms-dealloc-auth}
%
\typerule{SMS-Use-Authentic}{
}{
\smstraceagree{\specificev{Use\ \loc\ n};\sandboxtag;\specificev{\sigma}}{\textbf{Use}\ \specificev{\loc}\ \sandboxtag\ \bm{n}}
}{sms-use-auth}
%
\typerule{SMS-None-Authentic}{
}{
\smstraceagree{\specificev{\varepsilon}}{\bm{\varepsilon}}
}{sms-none-auth}
%
\typerule{SMS-Branch-Authentic}{
}{
\smstraceagree{\specificev{Branch\ n};\sandboxtag;\specificev{\sigma}}{\bm{\varepsilon}}
}{sms-branch-auth}
%
\typerule{SMS-Binop-Authentic}{
}{
\smstraceagree{\specificev{Binop\ n};\sandboxtag;\specificev{\sigma}}{\bm{\varepsilon}}
}{sms-binop-auth}
%
\typerule{SMS-Abort-Authentic}{
}{
\smstraceagree{\specificev{\lightning}}{\bm{\lightning}}
}{sms-abort-auth}
%
\judgbox{\smstraceagree[^{*}]{\mstrace}{\abstrace}}{,,Memory-Safety specific trace $\mstrace$ describes same trace as $\abstrace$.''}
%
\typerule{SMS-Refl-Authentic}{
}{
\smstraceagree{\hole{\cdot}}{\hole{\cdot}}
}{sms-refl-auth}
%
\typerule{SMS-Trans-Authentic}{
\smstraceagree{\msevent}{\absevent} &
\smstraceagree{\mstrace}{\abstrace}
}{
\smstraceagree{\msevent \cdot \mstrace}{\absevent \cdot \abstrace}
}{sms-trans-auth}
%
\typerule{SMS-Trans-Authentic-Lign}{
\smstraceagree[^*]{\mstrace}{\abstrace}
}{
\smstraceagree[^*]{\specificev{\emptyevent}\cdot\mstrace}{\abstrace}
}{sms-trans-auth-lign}
%
\typerule{SMS-Trans-Authentic-Rign}{
\smstraceagree[^*]{\mstrace}{\abstrace}
}{
\smstraceagree[^*]{\mstrace}{\bm{\emptyevent}\cdot\abstrace}
}{sms-trans-auth-rign}
\end{center}
}{sms-trace-agreement}{Trace Agreement.}
\begin{definition}[Trace is spatial memory safe via monitor.]\label{def:src:trace:sms}
We say $\texttt{SMS}(\mstrace)$ iff $\exists \abstrace\ \smsmonitor$ such that:
\begin{itemize}
\item $\smstraceagree{\mstrace}{\abstrace}$
\item and $\monitorcheck{\emptyset}{\smsmonitor}{\abstrace}$
\end{itemize}
\end{definition}
\begin{lemma}[$\texttt{SMS}(\mstrace)$ implies $\mstrace\in\operatorname{smsafe}$]\label{lem:smssafe-tracesms}
If
\begin{assumptions}
\item\label[ass]{asm:smssafe-tracesms:sms} $\texttt{SMS}(\mstrace)$
\end{assumptions}
Then
\begin{goals}
\item $\mstrace\in\operatorname{smsafe}$
\end{goals}
\end{lemma}
\begin{proof}
Invert \Cref{asm:smssafe-tracesms:sms}:
\begin{passumptions}{H}
\item\label[ass]{asm:smssafe-tracesms:traceag} $\smstraceagree{\mstrace}{\abstrace}$
\item\label[ass]{asm:smssafe-tracesms:monstep} $\monitorcheck{\emptyset}{\smsmonitor}{\abstrace}$
\end{passumptions}
The proof follows with an induction on \Cref{asm:smssafe-tracesms:monstep}.
\end{proof}
\subsubsection{\gls*{ms} Monitor}
\myfig{
\begin{gather*}
\begin{aligned}
\mi{Abstract\ Store}~\msmonitor =&\ \tmsmonitor\times\smsmonitor \\
\mi{Abstract\ Events}~\absevent \bnfdef&\ \absevent_{\tmssafe}\times\absevent_{\smssafe}\\
\end{aligned}
\end{gather*}
}{ms-monitor}{\gls{ms} Monitor.}
\begin{definition}[\glsfirst*{ms}]\label{def:trace:msdef}\label{def:memsafe}
$
\mssafe:=\tmssafe \cap \smssafe
$
\end{definition}
\myfig{
\begin{center}
\typerule{tms-sms-E}{
\monitorcheck[]{\smsmonitor}{\smsmonitor}{\absevent[_{\tmssafe}]} &
\monitorcheck[]{\tmsmonitor}{\tmsmonitor}{\absevent[_{\smssafe}]} \\
}{
\monitorcheck[]{(\tmsmonitor;\smsmonitor)}{(\tmsmonitor['];\smsmonitor['])}{\absevent[_{tms}];\absevent[_{sms}]}
}{tms-sms-empty}
%
\typerule{tms-sms-Refl}{
\monitorcheck{\tmsmonitor}{\tmsmonitor}{\hole{\cdot}} &
\monitorcheck{\smsmonitor}{\smsmonitor}{\hole{\cdot}}
}{
\monitorcheck{(\tmsmonitor;\smsmonitor)}{(\tmsmonitor;\smsmonitor)}{\hole{\cdot}}
}{tms-sms-refl}
%
\typerule{tms-sms-Trans}{
\monitorcheck[]{T}{T'}{\absevent}&
\monitorcheck{T'}{T''}{\abstrace}&
}{
\monitorcheck{T}{T''}{\absevent\cdot\abstrace}
}{tms-sms-trans}
\end{center}
}{tms-sms-step}{Steps of combined \gls{tms} + \gls{sms} Monitor.}
\myfig{
\begin{center}
\judgbox{\mstraceagree[^{*}]{\mstrace}{\abstrace}}{,,Memory-Safety specific trace $\mstrace$ describes same trace as $\abstrace$.''}
%
\typerule{MS-Refl-Authentic}{
}{
\mstraceagree{\hole{\cdot}}{\hole{\cdot}}
}{ms-refl-auth}
%
\typerule{MS-Trans-Authentic}{
\mstraceagree{\msevent}{\absevent[_{\tmssafe}]} &
\mstraceagree{\msevent}{\absevent[_{\smssafe}]} &
\mstraceagree{\mstrace}{\abstrace}
}{
\mstraceagree{\msevent \cdot \mstrace}{(\absevent[_{\tmssafe}];\absevent[_{\smssafe}]) \cdot \abstrace}
}{ms-trans-auth}
%
\typerule{MS-Trans-Authentic-Lign}{
\mstraceagree[^*]{\mstrace}{\abstrace}
}{
\mstraceagree[^*]{\specificev{\emptyevent}\cdot\mstrace}{\abstrace}
}{ms-trans-auth-lign}
%
\typerule{MS-Trans-Authentic-Rign}{
\mstraceagree[^*]{\mstrace}{\abstrace}
}{
\mstraceagree[^*]{\mstrace}{\bm{\emptyevent}\cdot\abstrace}
}{ms-trans-auth-rign}
\end{center}
}{ms-trace-agreement}{Trace Agreement.}
\begin{definition}[Trace is memory safe via monitor.]\label{def:src:trace:ms}
We say $\texttt{MS}(\mstrace)$ iff $\exists \abstrace\ \msmonitor$ such that:
\begin{itemize}
\item $\mstraceagree{\mstrace}{\abstrace}$
\item and $\monitorcheck{\emptyset}{\msmonitor}{\abstrace}$
\end{itemize}
\end{definition}
\begin{lemma}[$\texttt{MS}(\mstrace)$ implies $\mstrace\in\operatorname{msafe}$]\label{lem:mssafe-tracems}
If
\begin{assumptions}
\item\label[ass]{asm:mssafe-tracems:ms} $\texttt{MS}(\mstrace)$
\end{assumptions}
Then
\begin{goals}
\item $\mstrace\in\operatorname{msafe}$
\end{goals}
\end{lemma}
\begin{proof}
Invert \Cref{asm:mssafe-tracems:ms}:
\begin{passumptions}{H}
\item\label[ass]{asm:mssafe-tracems:traceag} $\mstraceagree{\mstrace}{\abstrace}$
\item\label[ass]{asm:mssafe-tracems:monstep} $\monitorcheck{\emptyset}{\msmonitor}{\abstrace}$
\end{passumptions}
The proof follows with \Cref{lem:tmssafe-tracetms,lem:smssafe-tracesms}.
\end{proof}
\subsubsection{\gls*{scct} Monitor}
\sCCT-Problems:
\begin{itemize}
\item branching or predicated execution
\item comparisons are an issue: can only get the content of special flag register by branching
\item timing of loads/stores changes
\item mult/div is problematic. mult is safe on modern procs, but not on microprocs
\item bitshifts may translate into loops (unless bitshift by constant)
\end{itemize}
To remedy most of these real-world problems, which are dependent on the hardware, we introduce another language which has $\sCCT$-hardened instructions.
That is, we assume there exists an $\hat{\oplus}$ which behaves similarily to $\oplus$, but without leaking timing information.
Moreover, we also assume that there are $\sCCT$-versions of reading and writing.
If the instruction set architecture does not support these, we argue that there is some encoding that can be done in the style of FaCT that the compiler would have to do.
For example, to circumvent loading/storing and ensure $\sCCT$-versions, the register allocator could ensure that this variable stays in a register. Whenever this is not possible, one could spill and, prior to re-loading the variable, invalidate the caches. Another option is to simply load the whole array sequentially and select the relevant entry using a bitmask operation.
\myfig{
\begin{gather*}
\begin{aligned}
\mi{Abstract\ Store}~\scctmonitor =&\ \emptyset \\
\mi{Abstract\ Security\ Tag}~\bm{\sigma} \bnfdef&\ \lock \mid \unlock \\
\mi{Abstract\ Pre-Events}~\absevent_{b} \bnfdef&\ \textbf{Any} \\
\mi{Abstract\ Events}~\absevent \bnfdef&\ \bm{\varepsilon} \mid \absevent_{b};\bm{\sigma} \mid \abstermination
\end{aligned}
\end{gather*}
}{scct-monitor}{\gls{scct} Monitor.}
The \sCCT monitor serves as an overapproximation for cryptographic constant-time code.
Here, any event whatsoever is considered bad, since this leaks information by means of a sidechannel.
\begin{definition}[\glsfirst*{scct}]\label{def:trace:scctdef}\label{def:scct}
% \begin{nscenter}
\noindent\[
\scctsafe:=\left\{\trace[_{\ctsafe}] \left|\begin{array}{l}
\trace[_{\ctsafe}]=\hole{\cdot} \text{ or } \exists\trace[_{\ctsafe}'],\trace[_{\ctsafe}]=\event[_b^{\ctsafe}];\unlock\cdot\trace[_{\ctsafe}'] \wedge \trace[_{\ctsafe}']\in\scctsafe
\end{array}\right.\right\}
\]
% \end{nscenter}
\end{definition}
\myfig{
\begin{center}
\judgbox{\monitorcheck[]{\scctmonitor}{\scctmonitor[']}{\absevent}}{,,Given abstract state $\scctmonitor$, step to abstract state $\scctmonitor'$\\ emitting an abstract event $\absevent$.''}
\judgbox{\monitorcheck{\scctmonitor}{\scctmonitor[']}{\abstrace}}{,,Reflexive-Transitive closure of above judgement.\\$\abstrace$ is a list of abstract events.''}
%
\typerule{scct-None}{
}{
\monitorcheck[]{\scctmonitor}{\scctmonitor}{\bm{\varepsilon}}
}{scct-none}
%
\typerule{scct-Abort}{
}{
\monitorcheck[]{\scctmonitor}{\scctmonitor}{\bm{\lightning};\bm{\unlock}}
}{scct-abort}
%
\typerule{scct-Refl}{
}{
\monitorcheck{\scctmonitor}{\scctmonitor}{\hole{\cdot}}
}{scct-refl}
%
\typerule{scct-Trans}{
\monitorcheck[]{\scctmonitor}{\scctmonitor[']}{\absevent}&
\monitorcheck{\scctmonitor[']}{\scctmonitor['']}{\abstrace}
}{
\monitorcheck{\scctmonitor}{\scctmonitor['']}{\absevent\cdot\abstrace}
}{scct-trans}
\end{center}
}{scct-step}{Steps of \gls{scct} Monitor.}
\myfig{
\begin{center}
\judgbox{\specificev{\sigma}=\bm{\sigma}}{,,Equality of Security Tags.''}$\;$\\
%
\typerule{secure-eq}{
}{
\specificev{\lock}=\lock
}{secure-eq}
%
\typerule{insecure-eq}{
}{
\specificev{\unlock}=\unlock
}{insecure-eq}
%
\judgbox{\sccttraceagree{\msevent}{\absevent}}{,,Memory-Safety specific event $\msevent$ describes same action as $\absevent$.''}
%
\typerule{\sCCT-Public-Authentic}{
}{
\sccttraceagree{\msevent[_b];\sandboxtag;\specificev{\unlock}}{\bm{\varepsilon}}
}{scct-public-auth}
%
\typerule{\sCCT-Use-Authentic}{
}{
\sccttraceagree{\specificev{Use\ \loc\ n};\sandboxtag;\specificev{\lock}}{\textbf{Any};\bm{\lock}}
}{scct-use-auth}
%
\typerule{\sCCT-Abort-Authentic}{
}{
\sccttraceagree{\specificev{\lightning}}{\bm{\lightning}}
}{scct-abort-auth}
%
\typerule{\sCCT-None-Authentic}{
}{
\sccttraceagree{\specificev{\varepsilon}}{\bm{\varepsilon}}
}{scct-none-auth}
%
\typerule{\sCCT-Branch-Authentic}{
}{
\sccttraceagree{\specificev{Branch\ n};\sandboxtag;\specificev{\lock}}{\textbf{Any};\bm{\lock}}
}{scct-branch-auth}
%
\typerule{\sCCT-Binop-Authentic}{
}{
\sccttraceagree{\specificev{Binop\ n};\sandboxtag;\specificev{\lock}}{\textbf{Any};\bm{\lock}}
}{scct-binop-auth}
%
\judgbox{\sccttraceagree[^*]{\mstrace}{\abstrace}}{,,Memory-Safety specific trace $\mstrace$ describes same trace as $\abstrace$.''}
%
\typerule{\sCCT-Refl-Authentic}{
}{
\sccttraceagree[^*]{\hole{\cdot}}{\hole{\cdot}}
}{scct-refl-auth}
%
\typerule{\sCCT-Trans-Authentic}{
\sccttraceagree{\msevent}{\absevent} &
\sccttraceagree[^*]{\mstrace}{\abstrace}
}{
\sccttraceagree[^*]{\msevent\cdot\mstrace}{\absevent\cdot\abstrace}